Hack the Computer Model
(Please give me feedback on this site -- good, bad or indifferent: Tom Arnall<email@example.com>.)
(Hack the Computer Model was put together with David Eck's xLogicCircuits system, a good introduction to which can be found at: http://math.hws.edu/TMCM/java/xLogicCircuits/index.html.)
If you click this button,
then the button marked 'Power' in the resulting window, you will be looking at a working model of a computer. The model represents a computer which is running a program. The program consists of a loop in which the computer gets two values from Memory, adds them, and displays the result. To lay bare the essential physical events which underlie this behavior is the aim of this presentation.
To understand the preceding statement, notice first the rectangle in the lower right section of the diagram, labeled 'Adder-Subtracter', along with the two sets of wires on the left of the square and the single set of wires on the right of it. If you wait a bit after clicking the Power button, you will observe that in the set of four wires at the top left side of the Adder-Subtracter, the first three wires turn red. When these three turn red, so do the corresponding wires on the right side of the component. Then, after a bit longer, you will see the first in the second set of wires on the left also turn red, and immediately thereafter you will see all the wires in the right hand set turn black and then the fourth wire turn red.
What's happening? For an initial answer to this question, think of the upper left-hand wires as a number arranged in vertical format, in which the red wires stand for a 1 and the black wires stand for a 0 and in which the uppermost wire is the most significant digit in the number and the fourth wire the least significant digit. You then have the number:
Or, to write it horizontally,
Interpreted by the same method, the second set of wires on the left becomes the number 0001. And the 'list' of numbers on the right side of the component becomes the number 1000. And if you interpret the numbers on the left side to be addends and the number on the right side to be their sum, you have:
This of course is incorrect. The correct sum is 112. But is it? Yes, 112 is the correct sum, if the numbers are interpreted as decimal or base 10 numbers. But what if they are viewed as having a different base, say a base of 2? In that case, you can do the following calculation to get in decimal notation the values in the "equation" which the device is displaying:
= 4 + 2 + 1 + 1
And if you similarly interpret the number on the right side of the device you have:
1×23 = 8
8 = 8
which is of course exactly right, i.e., in a base 2 numbering system
111 + 1 = 1000
We use a base 2 system because the wires attached to the device have only two states, on or off, corresponding to the numbers 1 and 0. If the wires knew 10 states, we could use the familiar decimal or base 10 system.
The Adder-Subtracter by the way is the smartest device in this system or any other computer, and all the device does is to add and subtract.
The rest of this presentation is organized around the Adder-Subtracter and purposes to help you follow in the model how the addends get to the device and where the sum goes.
To the left of the Adder-Subtracter are two devices marked 'A-S Reg'. They are the Adder-Subtracter Registers and serve to hold the addends for the Adder-Subtracter. To see exactly how this works, reset the system (turn it off and on), and after a few seconds you will see three of the four wires on the left side of the device turn red. After a few seconds more the wire attached to the top of the device turns red and then immediately the first three wires on the right of the device turn red. Keep looking and you will see the top wire go black and then the wires to the left of the device go black. But the wires to the right of the device will stay lit.
What happened? In technicalese, the Adder-Subtracter Register latched the contents of the System Bus for use by the Adder-Subtracter. If you understand this statement, skip this section. If not, here is a translation. The lines on the left side of the register carry data used by a number of different devices in the system, but only some of it is directly useful to the Adder-Subtracter. The Adder-Subtracter Register allows the useful data to its right side, i.e., to the input wires of the Adder-Subtracter, but only when it receives a signal from the wire at its top. In that case, it not only allows the data in, but holds it for future use, i.e., for when the lower Adder-Subtracter register gets its data in similar fashion and the two of them provide the addends to the Adder-Subtracter. Notice also that the Adder-Subtracter Register enables the Adder-Subtracter to maintain its output until it can be shown on the System Display, which is the set of four small circles on the right-hand edge of the diagram. (In general, a register admits and retains input data for the device which it serves.)
The data for the Adder -Subtracter, from where does it come? Its true origin is not the Adder-Subtracter Register but the device labeled 'Memory'. In fact, the first addend for the Adder-Subtracter, 0111, can be seen coming out of the upper right-hand wires of Memory as soon as the system is powered up. (Memory also holds special data - called 'instructions' - which have ultimate control of all of the devices in the system. More on this later.)
The Memory is the source of the data which comes to the Adder-Subtracter Registers and then to the Adder-Subtracter. To understand how exactly it arrives, reset the system and notice that when data appears at the inputs of the Adder-Subtracter Registers, it also appears at the inputs of the other registers in the system (except for the Instruction Register -- labeled 'IR' -- about which more further on). This collection of wires is the System Bus, and through it takes place the communication between all devices in the system which are able to communicate with the Adder-Subtracter. (Notice how this multiple use of the bus necessitates the blocking/admitting function of the registers.)
A register prevents unwanted System Bus signals from reaching the device which it serves. The Bus Gates perform a similar function, except that they protect the System Bus when devices are producing their outputs simultaneously, for example, Memory and the Adder-Subtracter.
On the right border of the diagram are four small circles, which, as you have probably noticed, 'light up' from time to time. This is the System Display. It could also be called the 'System Bus Display', since for every wire on the System Bus which is conducting the System Display shows a red circle. At the end of each cycle of the demonstration program the System Display shows the output of the Adder-Subtracter.
Instruction Pointer (labeled 'IP')
By now the reader may have noticed that most of the activity of the devices discussed up to this point consists simply of communication. This communication is precisely structured by the other devices in the system, which can be called Control Devices. For an example of such a device, consider the question, from where does Memory get its addressing information? The Memory is like a register in that it retains data for future use, but it contains far more data than a simple register. In fact, it is a set of many registers and therefore must have a feature which the normal register does not have, namely, Memory addressing. The two sets of wires on the left side of the device bring address data to the Memory and make it possible to access each of the registers -- also called Memory locations -- in the device. From where then comes this information?
In the demonstration program, the immediate source of addressing information is always the Instruction Pointer. The Instruction Pointer is a kind of counter, which in the demonstration program always begins with a content of 0, thus addressing location 0 in Memory. Location 0 in Memory contains, as mentioned earlier, the first addend to the Adder-Subtracter. (Besides the addend, Memory contains other data at location 0, special data called an 'instruction', which causes the system to allow the addend onto the System Bus and latch the content of the System Bus to the first Adder-Subtracter Register. Considering this latter type of data, Memory is a kind of control device.)
To see what is meant by saying that Memory 'contains' data, you can double click on the device in the diagram labeled 'Memory'. The browser display will show a new diagram in which there is a device labeled 'rom'. Click on that component and you will see yet another diagram with two devices labeled 'rom'. Click on the upper of the two and you will see a diagram similar to the preceding. Keep clicking on the upper of the two devices labeled 'rom' and you will finally come to a diagram containing a device marked '0'. Click on the device and you will see the contents of location 0 of Memory. At the top of the diagram there is a small circle indicating the source of current in the component. Click the Power button, then click the circle. You will see the 3 uppermost circles on the right edge of the diagram turn red, along with two others towards the bottom of the array of outputs. The upper four lights you have seen before as the input to the Adder-Subtracter:
or the number 0111. The two outputs below the number correspond to the just-mentioned instruction which tells the system to gate the number to the System Bus and latch the content of the System Bus to the Adder-Subtracter Register. (Click on the 'Shrink' button repeatedly to get back to the main diagram.)
Another example of a Control Device is the device labeled 'Gate Enabler'. This device signals the Bus Gates to allow - 'gate' - device outputs onto the System Bus. For example, it allows each of the numbers needed by the Adder-Subtracter Registers onto the System Bus from Memory. To see this, reset the system and notice how the data which appears right away on the first four lines of output from Memory. Notice then the progress of the data to the Adder-Subtracter register. At first the data is confined to the wires between the Instruction Register and the Bus Gates. Then comes a signal from the Gate Enabler - - on the wire coming from the right hand side of the device -- to the top of the Bus Gates device. At that point the data on the wires coming from the Instruction Register moves onto the System Bus and to the input side of the Adder-Subtracter Registers.
As an example of the control functions exercised by the device labeled 'Register Enabler', reset the system and observe again how the data (0111) coming from Memory is routed to the input of the Adder-Subtracter. After passing onto the System Bus, it sits at the input wires of the Adder-Subtracter Register until it receives a signal from the wire coming to its top from the Register Enabler. Upon this signal, the register moves the bus data to the input of the Adder-Subtracter. Note also how the signal from the Register Enabler occurs at the same time as the signal into the top of the Register Enabler from the Clock and a signal into the Register Enabler bottom from the Instruction Register (labeled 'IR').
Instruction Register (labeled 'IR')
As just noted, the Instruction Register, along with the Clock, controls the activity of the Register Enabler. Similarly, it controls the Gate Enabler. Unlike the other registers in the system, the Instruction Register does not get its data from the System Bus, but gets it directly from Memory. (Notice that the Instruction Register does not latch data from the lower four wires of Memory output and that in fact these wires are not used in the demonstration program.)
The Clock is the master juggler of the system. It is true that the instructions in Memory determine activity in the system, but this happens only in conjunction with the Clock. For example, in order for a signal to come from the Register Enabler, the device must receive a signal not only from the Instruction Register, but also from the Clock. And so for every change in the system: in one way or another, it is dependent on a pulse from the Clock.
If you study the Clock a bit you will notice it has six functions, each one filled by one of the six wires coming from it:
1. Signal the Memory Address Gate (labeled 'MA Gate') to allow address data from the Instruction Pointer to reach the Memory address inputs,
2. Signal the Instruction Register to latch Memory output,
3. Signal the Gate Enabler to respond to input from the Instruction Register and gate a device output to the System Bus,
4. Signal the Register Enabler to respond to input from the Instruction Register and signal a register to latch the data on the System Bus,
5. Pulse the Instruction Pointer to increment its count,
6. Signal the Instruction Pointer Loader (labeled 'IP Ldr') to load the contents of the Instruction Pointer Registers into the Clock. This occurs only once in the demonstration program and enables the program to restart from location 0 in Memory; otherwise the signal to the Instruction Pointer Loader is ignored.
Notice that in the case of its third and fourth functions, the Clock first gates data onto the System Bus and then enables latching of the data on the System Bus into a register. Similarly, with functions one and two, the Clock gates data to the Memory address inputs, then latches the resulting Memory output to the Instruction Register. This gating and latching activity is a major theme of the system.
The Instruction Pointer Loader (labeled 'IP Ldr')
As just mentioned, the Instruction Pointer Loader enables the system to restart the demonstration program. It does this with help from the Instruction Pointer Registers. The sequence is as follows:
and the Instruction Pointer Registers (labeled 'IP Reg')
1. After showing the output of the Adder-Subtracter on the System Display, the system increments the count in the Instruction Pointer. The corresponding location in Memory contains as its data portion the number 1111 (15 in base 10), along with instruction bits which cause the system to latch the number to the first Instruction Pointer Register.
2. The next instruction does likewise for the second Instruction Pointer Register.
3. The next instruction pulses the Instruction Pointer Loader, which in turn signals the Instruction Pointer to load into itself the contents of the Instruction Pointer Registers, at which point the content of the Instruction Pointer is 11111111.
4. The Clock signals the Instruction Pointer to increment its count. Because 11111111 is the largest number which the Instruction Pointer can hold, its count becomes 0, i.e., a pointer to location 0 of Memory, which is the state of the system at power up.
Here is a summary of the preceding material. The reader is strongly encouraged to study the diagram as she reads the following until she can see the data and signal flow described in each step.
1. The Instruction Pointer puts an address on the Memory Address Gate and the Clock signals the Memory Address Gate to allow the address onto the Memory address inputs.
2. The Clock signals the Instruction Register to latch the output coming from the Memory location addressed in the previous step.
3. The output from the Instruction Register, the data portion (the four wires at the top of the wires coming from Memory, called an 'addend' in the initial part of this presentation), goes to the Bus Gates, and the control portion goes to the Gate Enabler, causing the data portion to be gated onto the System Bus.
4. The Clock pulses the Register Enabler and this signal, combined with a signal from the control portion of the Instruction Register output, causes the Adder-Subtracter Register to latch the data on the System Bus.
5. The Clock pulses the Instruction Pointer to increment and point to the next Memory location.
6. The preceding steps are repeated to latch data to the second Adder-Subtracter Register.
7. The Adder-Subtracter outputs the sum of the numbers latched to the Adder-Subtracter Registers.
8. The first and second steps are repeated to put an instruction in the Instruction Register to gate the output of the Adder-Subtracter to the System Bus, which causes the output to be shown on the System Display.
9. As described above under Instruction Pointer Loader, the system resets itself to repeat the preceding steps.
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